A Survey on Analog-to-Digital Converters’ Architectures and Performance Analysis

Document Type : Original Article

Authors

1 Electrical Engineering Department, Faculty of Engineering, Port-said University, Port-said, Egypt.

2 Electrical Engineering Department, Faculty of Engineering, Port Said University, Port-Said, Egypt

3 Electrical Engineering Department, Faculty of Engineering, Port-Said University, Port-Said, Egypt.

4 Communication and Electronics Department, Faculty of Engineering, Menoufia University, Menouf, Egypt.

Abstract

Analog to digital converter (ADC) represents the link between the real world represented by real time analog signals and the digitized world represented by digital integrated circuits. The performance of the ADC depends on some important parameters such as resolution, sampling frequency, Signal-to-Noise Ratio (SNR), Power consumption and Figure-Of-Merit (FOM). This paper introduces a brief discussion of the most common ADC architectures. More detailed discussion on time-based ADCs is introduced and recent architectures introduced by researchers are presented and compared with each other in terms of linearity error, resolution and power consumption. Moreover, a comparison survey is presented on the most popular commercial ADCs. The data used in the survey are taken for about 1500 commercial ADCs from major integrated circuits companies such as Texas Instruments and Analog Devices. The aim of this paper is to give a detailed comparison on the most common ADCs to help researches to choose the best architecture that fits their desired application and to draw researchers’ attention towards time-based ADCs as they proved a promising performance improvements compared with other ADCs architectures in many applications such as software radio receivers.

Keywords